I think that the minimal step should be about 4 or 3 Hz. are very wide (18.35 Hertz per step), and, if the range is about 564 Hertz for each side, with 30 steps I'll never can sustain resonance (I would correct from a derivative control factor, but if it doesn't work, it would become a PID algorithm). and that the steps that would be available in case 2. The problem is that I don't know which values are elegible in case 1. To change the frequency on the clock with Clock_SetDividerValue(uint16 clkDivider) or but as I need to move smoothly the frequency from the program (see the image freq_resonance attached), I see at first sight two posibilities:ġ. i have seen what you sent, I understand that the clock was defined as the 8 bit period (256) multiplied by 5,000 Hertz, so you get a clock of 1.28 MHz. I hope CONSULTRON could continue helping me as he gave me the example I'm working with.Īs I stated first, I need to move frequency about +- 12% from a frequency, that is a little lower than 5 KHz, in order to sustain some resonance on the system. AIROC™ Wi-Fi and Wi-Fi Bluetooth Combos.
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